SemiJobs / Page 15

Semiconductor & Chip Design Jobs — Page 15 of 31

More semiconductor jobs, sourced directly from official career pages. ← Back to SemiJobs

• Staff Engineer, ASIC Development Engineering (STA, Sign Off) Sandisk · Bengaluru, KA, India
• ASIC Engineer || Design Verification || Exp 8+ YearsCisco · Bangalore, India
• Senior Physical Design EngineerMicrosoft · Malaysia, Pulau Pinang, Gelugor
• Physical Design Technical Lead, ASIC, TPUGoogle · Sunnyvale, CA, USA
• Sr. Engineer, CPU RTL DesignTenstorrent · Austin, Texas, United States; Santa Clara, California, United States
• TPU RTL Design EngineerGoogle · Sunnyvale, CA, USA
• IC Designer - Power ManagementApple · Cupertino
• Silicon Design Verification EngineerGoogle · Bengaluru, Karnataka, India
• Early Career - SoC Digital Design Engineer (M, F, D)Apple · Munich
• Principal DFT Engineer (Silicon Engineering)SpaceX · Irvine, CA
• Principal DFT Engineer (Silicon Engineering)SpaceX · Austin, TX
• ASIC Verification EEJBosch · bengaluru, , India
• Physical Design EngineerAccenture · Bengaluru
• Physical Design EngineerAccenture · Bengaluru
• Principal FPGA Image Pipeline EngineerAlcon · Goleta, California
• Digital Design: SerDes Digital IP Design EngineerBroadcom · USA-Colorado-Fort Collins-4380 Ziegler Road
• Physical Design Timing Engineer (STA)Broadcom · USA-CA San Jose Innovation Drive
• Principal IC Design EngineerBroadcom · USA-CO Broomfield
• Analog and Mixed Signal IC Design EngineerBroadcom · USA-CA Irvine Alton Parkway Bldg 1
• Analog and Mixed-Signal IC Design EngineerBroadcom · USA-Colorado-Fort Collins-4380 Ziegler Road
• Senior ASIC Verification EngineerCiena · Ottawa
• ASIC Engineering Technical LeaderCisco · Nuremberg, Germany
• ASIC Engineering Design Verification Leader (SystemVerilog, Python, C and UVM |8-12 years| Pune)Cisco · Pune, India
• ASIC Packaging Development Technical LeaderCisco · Taipei, Taiwan
• ASIC DFT Engineer - 4 to 8 yrsCisco · Bangalore, India