In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
Google’s data centers are the most advanced in the world. In this role, you will help build the state-of-the-art SoC’s that power these data centers by driving quality and reliability processes from the Integrated Circuit perspective. You will have an opportunity to create silicon and follow it into the field and back to drive improvements for the next-generations of chips.
You will have an understanding of Integrated Circuit (IC) flows, wafer processing, testing, qualification, yield, reliability, and failure analysis is expected. You will work with various cross-functional teams to develop quality and reliability specifications, develop and deploy design guidelines, and develop and execute and test plans. You will collaborate with global hardware quality and reliability teams, silicon design, validation and engineering teams.The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.
We're behind Google's groundbreaking innovations, empowering the development of AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.
Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Materials Science, Physics, or a related field or equivalent practical experience.
- 4 years of experience in Integrated Circuit (IC) silicon quality or reliability.
- Experience leading the product reliability life-cycle from post-tapeout through high-volume manufacturing.
- Experience with semiconductor complementary metal-oxide-semiconductor (CMOS) technology, device physics, and failure mechanisms.
Preferred qualifications:
- Master's degree in Electrical Engineering, Materials Science, or related field.
- Expertise in statistical data analysis using tools such as JMP, Python, or JMP Scripting Language (JSL).
- Familiarity with electrical failure analysis (EFA) and physical failure analysis (PFA) techniques.
- Knowledge of design-for-reliability (DfR) rules and implementation techniques.
- Track record with silicon reliability on process nodes and advanced packaging technologies.