SemiJobs / Page 7
Semiconductor & Chip Design Jobs — Page 7 of 31
More semiconductor jobs, sourced directly from official career pages. ← Back to SemiJobs
- SOC Design Verification EngineerIntel · India, Bangalore
- Senior Staff Mixed Signal IP Enablement and Debug EngineerIntel · US, California, Folsom
- Senior Mixed Signal IP Enablement and Debug EngineerIntel · US, California, Folsom
- Senior Physical Design EngineerIntel · India, Bangalore
- SoC Physical Design Clocking EngineerIntel · India, Bangalore
- SoC Logic Design EngineerIntel · India, Bangalore
- Principal FPGA / RTL Design Engineer - Signal ProcessingMotorola Solutions · Los Angeles, CA
- Senior Design Engineer - Memory SubsystemNVIDIA · India, Bengaluru
- Senior ASIC Design Engineer - XBAR IPNVIDIA · India, Bengaluru
- Senior Mask Layout Design EngineerNVIDIA · Taiwan, Hsinchu
- Experienced ASIC Verification EngineerSandisk · Omer, South District, Israel
- Experienced ASIC Verification EngineerSandisk · Kfar Saba, , Israel
- Analog/mixed-signal IC Design Engineer - Acacia (Hybrid)Cisco · San Jose, California, US
- Analog Layout DesignerCisco · Caesarea, Israel
- Senior Digital Design Electrical Engineer (Hybrid - Aguadilla, PR)RTX · US-PR-AGUADILLA-110 ~ Rd 110 N Km 28.8 ~ RD110
- Design Verification EngineerLightmatter · Toronto, ON
- Sr. Full Chip Physical Verification Engineer (Silicon Engineering)SpaceX · Irvine, CA
- ASIC RTL Design Engineer III, SiliconGoogle · Bengaluru, Karnataka, India
- SoC Design and Integration EngineerApple · Cupertino
- Sr. ASIC DFT Engineer (Silicon)SpaceX · Austin, TX
- Sr. ASIC DFT Engineer (Silicon)SpaceX · Irvine, CA
- Sr. ASIC DFT Engineer (Silicon)SpaceX · Sunnyvale, CA
- Experienced Analog Layout EngineerApple · Dublin
- AMS Analog Layout Engineer (f/m/d)Apple · Munich
- Analog Layout EngineerApple · Cambridge