SemiJobs
RoleSuite
CompaniesRemoteAboutMethodologyContactPrivacy
Updated 2026-06-10 12:00 UTC·© 2025–2026 RoleSuite
← Back to listings

Senior Power Modeling Engineer, Google Pixel

Google · Mountain View, CA, USA

The Pixel Hardware team is dedicated to building the best mobile experience by integrating hardware with Google’s AI and software.

As a Hardware Engineer in Power Modeling, you will play a critical role in defining the battery life and power efficiency of future Pixel devices. You will be responsible for the brains of our power projections developing the methodology, simulation tools, and data analytics that guide our product roadmap. From influencing battery sizing to optimizing how our silicon handles complex App and AI workloads, your work will directly impact millions of users.
The Google Pixel team focuses on designing and delivering the world's most helpful mobile experience. The team works on shaping the future of Pixel devices and services through some of the most advanced designs, techniques, products, and experiences in consumer electronics. This includes bringing together the best of Google’s artificial intelligence, software, and hardware to build global smartphones and create transformative experiences for users across the world.Individual pay is determined by factors including job-related skills, experience, and relevant education or training.

US: $159000 - $231000 (USD) + 15% bonus target + bonus + equity + benefits

Learn more about benefits at Google.

Minimum qualifications:

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, Physics, or a specialized field (e.g., optics, sensors, audio/DSP, etc.), or equivalent practical experience.
  • 4 years of experience in hardware system design and systems architecture, or 3 years of experience in power modeling and power management.
  • Experience in Python for automation/tool development and SQL for data extraction and analysis.
  • Experience within first-principle low-power concepts, including power delivery networks (PDN), architectures and power-states (e.g., Dynamic Voltage and Frequency Scaling (DVFS), sleep modes).

Preferred qualifications:

  • Master's degree or PhD in Electrical Engineering, Computer Engineering, Physics, or a related field (e.g., optics, sensors, audio/DSP).
  • Experience with hardware/software co-design and using simulation data to guide hardware architectural decisions.
  • Familiarity with mobile system-on-chip (SoC) architecture with specialization in one or more subsystems.
  • Ability to translate complex technical data into actionable insights for non-technical stakeholders.
Apply →

Other roles at Google

  • Head of Architecture and AI Business Transformation, Brazil (English, Portuguese)São Paulo, State of São Paulo, Brazil
  • Conversational AI ConsultantPune, Maharashtra, India
  • Top Customer Solutions Developer II, Networking, Google Cloud (Mandarin)Waterloo, ON, Canada
  • Senior Product Manager, RCS for BusinessKraków, Poland
  • Technical Account Manager, Google Cloud ConsultingSan Francisco, CA, USA
  • Head of Ads Finance (English, Portuguese)São Paulo, State of São Paulo, Brazil
  • Software Engineer III, Web EcosystemMexico City, CDMX, Mexico
  • Strategic Cloud Engineer, Appdev Practice (Japanese, English)Tokyo, Japan
  • Global Content Manager, AI Industry and Partner, Google CloudChicago, IL, USA
  • Global Content Manager, AI Developer Tools, Google CloudChicago, IL, USA

More Semiconductor roles

  • Senior WAN & ISP Engineer – Paris RegionMistral · Paris
  • Senior Design Verification EngineerJobgether · US
  • Physical Design Backend EngineerNVIDIA · Israel, Yokneam
  • ASIC Verification EngineerNVIDIA · India, Hyderabad
  • ASIC Verification EngineerNVIDIA · India, Hyderabad
  • ASIC Engineering Technical LeaderCisco · Tel Aviv-Yafo, Israel
  • NESD Test Engineer | Active Secret clearanceGeneral Dynamics · Any Location / Remote
  • IP Logic Design EngineerIntel · India, Bangalore
  • Analog Design EngineerTenstorrent · North America
  • Sr. Staff Physical Design Timing Engineer (STA)Lightmatter · Boston, MA