Senior Design Verification Engineer

This position is listed on behalf of a partner company, who manages all applications and next steps. Our partner is looking for a Senior Design Verification Engineer based in United States.

This role sits at the core of advanced semiconductor and communications technology development, focusing on ensuring the correctness, reliability, and performance of complex ASIC and FPGA designs.
It involves building and evolving sophisticated verification environments that validate RTL implementations across high-performance hardware systems.
You will work closely with design, systems, and software engineering teams to define verification strategies, coverage goals, and test methodologies.
The position leverages modern verification frameworks such as UVM, alongside emerging AI-driven verification tools to accelerate and enhance chip validation.
You will be responsible for end-to-end verification ownership, from planning and testbench development to debugging and coverage closure.
This is a highly technical, hands-on role in a fast-paced engineering environment focused on cutting-edge communications technologies.
It is ideal for an experienced verification engineer who thrives on complex problem-solving and system-level thinking.

• Define and execute comprehensive design verification strategies for ASIC and FPGA systems, ensuring functional correctness, performance validation, and coverage closure across complex designs.
• Develop and maintain advanced SystemVerilog/UVM-based testbenches, including drivers, monitors, scoreboards, sequences, and reference models for diverse hardware interfaces.
• Utilize and extend industry-standard verification methodologies such as UVM (Universal Verification Methodology) for scalable and reusable test environments.
• Plan, track, and manage verification efforts using Agile tools such as Jira while ensuring alignment with program schedules and deliverables.
• Analyze functional and code coverage metrics to ensure thorough validation of design intent and identify verification gaps.
• Debug complex hardware and testbench issues by working closely with RTL engineers using languages such as SystemVerilog and VHDL/Verilog.
• Manage regression testing environments, compute resources, and simulation workflows using tools such as Questa, Cadence Xcelium, and Synopsys VCS.
• Evaluate and adopt emerging AI-driven verification tools and agentic workflows to improve productivity and coverage efficiency.
• Collaborate with cross-functional engineering teams to define and refine verification requirements and quality standards.
• Drive technical issues to resolution with strong ownership from identification through closure.

Requirements:

• 8+ years of experience in design verification for ASIC or FPGA systems.
• Strong hands-on expertise in UVM-based testbench development and SystemVerilog programming.
• Bachelor’s degree in Electrical Engineering, Computer Engineering, or related technical discipline.
• Deep understanding of digital design fundamentals, timing considerations, and hardware architecture concepts.
• Experience working with industry-standard simulators such as Questa, Xcelium, or VCS.
• Familiarity with object-oriented programming principles and reusable testbench design methodologies.
• Experience working in Agile environments with tools such as Jira for planning and tracking.
• Strong debugging skills across RTL and testbench environments (Verilog/VHDL/SystemVerilog).
• Exposure to AI-assisted design verification workflows and emerging agentic development tools is highly valued.
• Excellent communication skills with the ability to collaborate across distributed engineering teams.
• Strong attention to detail, disciplined engineering practices, and ability to work independently with ownership.
• US citizenship required with eligibility to obtain a security clearance.

Benefits:

• Competitive annual salary ranging from $141,500 to $224,000, with higher ranges in certain metro areas up to $264,000.
• Eligibility for additional cash bonuses and equity-based compensation.
• Comprehensive medical, dental, and vision insurance coverage.
• Retirement and financial wellness programs.
• Remote or hybrid flexibility depending on role requirements.
• Exposure to cutting-edge aerospace and communications technology development.
• Career growth opportunities within advanced semiconductor and systems engineering domains.
• Inclusive and collaborative engineering culture focused on innovation and impact.