SemiJobs / Page 18

Semiconductor & Chip Design Jobs — Page 18 of 31

More semiconductor jobs, sourced directly from official career pages. ← Back to SemiJobs

• FPGA Build System Engineer - Engineering Productivity - SydneyArista Networks · Sydney, NSW, Australia
• Technician 3- Component DFM EngineeringSandisk · Batu Kawan, Penang, Malaysia
• R&D Engineer IC Design 4Broadcom · USA-TX-Austin - River Place B7
• Design Verification EngineerBroadcom · USA-CA San Jose Innovation Drive
• FPGA Development InternCiena · Ottawa
• ASIC Design Verification EngineerCisco · San Jose, California, US
• Component Engineer - Semiconductor DevicesCisco · San Jose, California, US
• ASIC EngineerCisco · Bangalore, India
• ASIC Engineering Design Verification Leader (SystemVerilog, Python, C and UVM |12-16 years| Pune)Cisco · Pune, India
• ASIC Engineering Digital Design Leader ( digital design, FSM, CPU sub-systems, complex SOCs, FPGA validation | 12-16 Years | Pune)Cisco · Pune, India
• ASIC Physical Design EngineerHewlett Packard Enterprise · Bengaluru, Karnātaka, India
• Senior AI SoC Design EngineerIntel · US, California, Santa Clara
• Senior AI SoC Design EngineerIntel · US, California, Santa Clara
• Mixed Signal Design Verification EngineerIntel · Virtual India
• Senior Reliability Engineer - LPU PackagingNVIDIA · US, CA, Santa Clara
• ASIC Design Engineer - New College Grad 2026NVIDIA · US, CA, Santa Clara
• Senior ASIC Floorplan Design EngineerNVIDIA · US, CA, Santa Clara
• 2026 Fulltime-Raytheon FPGA Electrical Engineer IRTX · US-AL-HUNTSVILLE-315 ~ 315 Bob Heath Dr ~ BOB HEATH
• Senior Analog Design EngineerSilicon Labs · Austin
• Substation Physical DesignerLeidos · 6314 Remote/Teleworker US
• Senior ASIC Methodology Engineer - LPU DivisionNVIDIA · Canada, Remote
• Platform and Chassis ASIC Architect, SiliconGoogle · Bengaluru, Karnataka, India
• Analog Design Engineer, Google CloudGoogle · Sunnyvale, CA, USA
• Technical Lead Manager, Machine Learning, Memory Subsystem DesignGoogle · Sunnyvale, CA, USA
• Early Career - SoC DFT Verification Engineer (m, f, d)Apple · Munich