SemiJobs / Page 20

Semiconductor & Chip Design Jobs — Page 20 of 31

More semiconductor jobs, sourced directly from official career pages. ← Back to SemiJobs

• Senior Physical Design Methodology Engineer, PPA Fusion CompilerNVIDIA · US, CA, Santa Clara
• Senior ASIC Design EngineerNVIDIA · US, CA, Santa Clara
• Chip Design Verification EngineerNVIDIA · Israel, Tel Aviv
• Chip Design & Verification EngineerNVIDIA · Israel, Yokneam
• Formal Verification EngineerNVIDIA · Israel, Tel Aviv
• Lead Post-Silicon Validation EngineerNVIDIA · US, CA, Santa Clara
• Senior Digital Design EngineerRTX · US-AZ-TUCSON-M02 ~ 1151 E Hermans Rd ~ BLDG M02
• SRAM Layout EngineerSamsung Electronics · SSIR, Goldstone, Bangalore, India
• Principal Circuit Design EngineerMicrosoft · United States, North Carolina, Raleigh
• IC Packaging Integration EngineerApple · Austin
• PHY RTL Design EngineerApple · Sunnyvale
• Process Technologist - CMOSApple · Livorno
• Engineering Director, Mixed-Signal Design, Google CloudGoogle · Sunnyvale, CA, USA
• Internship AI Service/Digital DesignBolcomen · Utrecht
• IC Packaging EngineerApple · Taipei
• CPU Circuit Design EngineerIntel · Israel, Haifa
• Principal Analog Circuit Design Engineer - SerDesIntel · Virtual Canada
• Principal Analog Circuit Design Engineer - SerDesIntel · Virtual Canada
• GPU Design Verification EngineerIntel · India, Bangalore
• CPU-SoC Mask Layout DesignerIntel · Malaysia, Penang
• Digital Design LeadMorningstar · Chicago
• Senior ASIC Physical Design Engineer, NetlistingNVIDIA · US, CA, Santa Clara
• Senior Formal Verification EngineerNVIDIA · US, CA, Santa Clara
• Senior Software R&D Engineer, VLSI Physical DesignNVIDIA · US, TX, Austin
• Senior ASIC Verification Engineer, Coherent High Speed InterconnectNVIDIA · Canada, Toronto