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SemiJobs / Page 21

Semiconductor & Chip Design Jobs — Page 21 of 31

More semiconductor jobs, sourced directly from official career pages. ← Back to SemiJobs

  • Senior DFT EngineerNVIDIA · US, CA, Santa Clara
  • Chip Design StudentAmazon · Tel Aviv-Yafo, Tel Aviv, ISR
  • Formal Verification Engineer, Annapurna LabsAmazon · Cupertino, California, USA
  • Design Verification Engineer, Silicon and Systems GroupAmazon · Bengaluru, Karnataka, IND
  • MLA IP Design Verification Engineer, Annapurna LabsAmazon · Cupertino, California, USA
  • Digital Design / Hardware Engineer StaffLockheed Martin · Owego, New York
  • Spacecraft Field Programmable Gate Array (FPGA) Engineer - Millennium Space SystemsBoeing · USA - El Segundo, CA
  • DFT EngineerBroadcom · USA-CA San Jose Innovation Drive
  • Analog/Mixed-Signal Design EngineerBroadcom · United Kingdom – Edinburgh – Exchange Tower
  • Analog/Mixed-Signal Design EngineerBroadcom · United Kingdom – Edinburgh – Exchange Tower
  • ASIC Physical Design EngineerCisco · Maynard, Massachusetts, US
  • CAD/Methodology Physical Design Team LeadCisco · Bangalore, India
  • Digital Design Engineer (FPGA)ESAB · Sweden Goteborg
  • ASIC Design EngineerHewlett Packard Enterprise · Bengaluru, Karnātaka, India
  • Design Verification EngineerIntel · US, California, Folsom
  • Engineer/ Principal Engineer Software - FPGA DeveloperNorthrop Grumman · United States-California-El Segundo
  • Senior Circuit Design EngineerNVIDIA · US, CA, Santa Clara
  • Senior ASIC Verification Engineer, Coherent High Speed InterconnectNVIDIA · US, CA, Santa Clara
  • Senior Systems Prototyping and Emulation EngineerNVIDIA · US, CA, Santa Clara
  • Chip Design Verification EngineerNVIDIA · Israel, Beer Sheva
  • Physical Design Methodology EngineerNVIDIA · Taiwan, Hsinchu
  • Senior Chip Design Verification EngineerNVIDIA · Israel, Tel Aviv
  • Principal Engineer, GPU Architect & ModelingSamsung Electronics · 3655 N 1st St, San Jose, CA, USA
  • Engineer, GPU RTL Design - Pixel PipeSamsung Electronics · 3655 N 1st St, San Jose, CA, USA
  • Senior Engineer, GPU RTL Design - Pixel PipeSamsung Electronics · 3655 N 1st St, San Jose, CA, USA
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