SemiJobs / Page 10
Semiconductor & Chip Design Jobs — Page 10 of 31
More semiconductor jobs, sourced directly from official career pages. ← Back to SemiJobs
- Early Career — DFT Engineer (M, F, D)Apple · Munich
- Sr. Physical Design Engineer - Static Timing Analysis, Annapurna Labs, Cloud Scale Machine LearningAmazon · Cupertino, California, USA
- High-Speed Digital Design EngineerThe Aerospace Corporation · El Segundo, CA
- Subject Matter Expert Electronics Design and Analysis Engineer (Electronic Packaging Design)Boeing · USA - El Segundo, CA
- Electrical Schematic Designer/Concepteur de schémas électriquesCaterpillar · Laval, Quebec
- Mixed Signal Design EngineerCiena · Ottawa
- ASIC Engineer Co-op (Sept 2026, 4 Months)Ciena · Ottawa
- FPGA HW Engineering Technical LeaderCisco · San Jose, California, US
- ASIC Physical Design EngineerHewlett Packard Enterprise · San Jose, California, United States of America
- Mixed Signal Logic Design EngineerIntel · US, California, Folsom
- Senior AI SoC Design EngineerIntel · US, California, Santa Clara
- Post-silicon Validation and Debug EngineerIntel · US, Oregon, Hillsboro
- CPU Physical Design EngineerIntel · US, Texas, Austin
- CPU Physical Design EngineerIntel · US, Texas, Austin
- CPU Physical Design EngineerIntel · US, Texas, Austin
- Substation Physical Design EngineerLeidos · Pune, India
- Senior Chip Design Hardware Emulation EngineerNVIDIA · Israel, Tel Aviv
- Senior Physical Design Methodology Engineer, Innovus FlowsNVIDIA · US, CA, Santa Clara
- Physical Design Backend EngineerNVIDIA · Israel, Yokneam
- Physical Design Backend EngineerNVIDIA · Israel, Tel Aviv
- Physical Design EngineerNVIDIA · Taiwan, Hsinchu
- Senior Digital Design EngineerNVIDIA · US, CA, Santa Clara
- 2026 Fulltime - Raytheon RF Digital Design Integration & Test Engineer I (Onsite)RTX · US-TX-MCKINNEY-513WD ~ 2501 W University Dr ~ WING D BLDG
- ASIC/FPGA Verification Engineer IIILockheed Martin · Multiple Locations
- ASIC/FPGA Verification Engineer IIILockheed Martin · Multiple Locations