As a Senior Test and Post-Silicon Validation Lead, you will drive the bring-up, characterization, and high-volume manufacturing (HVM) release of our next-generation Analog Mixed-Signal (AMS) ASICs. In this critical leadership role, you will bridge the gap between design, DFT, and product engineering, ensuring zero-defect quality and optimized cost-of-test for our upcoming product lines. You will architect ATE test strategies and guide a small team of engineers through complex yield and performance bottlenecks.
Google's Raxium display group has established a revolutionary semiconductor materials display technology that enables new functionality in display products, bringing to users a closer and more natural linkage between the digital and physical realms in applications such as augmented reality (AR) and light-field display. With start-up roots and a state-of-the-art compound semiconductor fab in Silicon Valley, Raxium is seeking to build upon its engineering team with an aim to disrupt next-generation display markets.
Based on 293 disclosed Semiconductor salaries on RoleSuite, the role pays a median of $177K/year, with most offers between $148K and $210K (10th–90th percentile: $130K–$243K).
Google ranks among the higher-paying employers for this role, at a $200K median across 44 disclosed postings.
This posting lists $240K–$334K, above the $177K market median.
See the full Semiconductor salary breakdown →